Department of Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran
Department of Computer Engineering, Sharif University of Technology, Tehran, Iran
All practical digital circuits are usually a mixture of combinational and sequential logic. Flip–flops are essential to sequential logic therefore fuzzy flip–flops are considered to be among the most essential topics of fuzzy digital circuit. The concept of fuzzy digital circuit is among the most interesting applications of fuzzy sets and logic due to the fact that if there has to be an ultimate fuzzy computer then fuzzy circuitry is inevitable. In this research field, hardware realization of fuzzy negation, t–norms and t–conorms have been well studied in details meanwhile no formal model is introduced for more complex fuzzy circuitry such as combinational circuits, sequential circuits or memory modules. The lack of a formal model checker indicates flaws and design deficiencies are usually remain out of sight therefore validating fuzzy logic circuits was impossible to this date. In this paper we are elaborating the application of Fuzzy Program Graph in symbolic checking of fuzzy flip–flops; thus, the content is mainly focused on formal modelling of fuzzy flip–flops and investigating their correctness. To this purpose we investigated design deficiencies of a multivalued D flip–flop and found a dynamic hazard then we proposed a formal model toward fuzzy J–K flip–flops to further elaborate applications of proposed formal model and model checking approach in detecting design phase deficiencies.